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SPI Protocol MCQs Unit 2
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1. SPI Communication always depends on ________, as it generates clock signals.
Slave
Clock
Master
Timer
2. The clock signal in SPI is updated via properties of ______?
Clock Polarity
Timer
Interfacing
Master
3. Clock polarity in SPI are sampled on either rising or _____ type edge of the clock cycle.
Standing
Falling
Steady
Continuous
4. Clock phase in SPI are sampled on either the first or _____ number edge of the clock cycle.
First
Second
Both a and b
Last
5. ____ can be set by the master to access for bits to be the output.
Clock polarity
Timing signal
Synchronous
Asynchronous
6. In ____________ state, the select line of slave is kept at high voltage level.
Transmitting
Idle
Continuous
Restart
7. ___ pins in multiple are available on the master side of SPI.
CS/SS
CC/SS
CS/CS
SS/CS
8. Multiple slaves are connected to many master or single master which can be wired in ______ fashion?
Serial
Parallel
Hybrid
None of the above
9. If one CS/SS pin exists then multiple slaves are connected to master by ________ process?
Timing circuit
Clock Signal
Daisy-chaining
Cycling
10. Data transferred from master to slave is sent via _____ first.
LSB
MSB
USB
SPI
11. Data transferred from slave to master is sent with _____ first.
LSB
MSB
USB
SPI
12. Slave is in operating state when master switches CS/SS pin to ____ voltage state.
High
Low
More
Fast
13. When master sends data over MOSI line then which component _____ reads the bits as they received.
Master
Slave
Timer
Circuit
14. In SPI which bits are absent?
Stop
Continues
Starts
Both a and c
15. SPI has a higher data transfer rate than _____?
USB
USART
I2C
IPC
16. Data transfer and receive done at same time via ____ lines.
MOSI
MISO
MSOI
Both a and b
17. Disadvantage of SPI is it requires____ number of wires?
Two
Four
Three
One
18. Disadvantage of SPI is it allows only ____ number of master?
Single
Multiple
More
Null
19. Error checking can’t be done using _____ protocol.
SPI
I2C
UART
IPC
20. ______ is not present on data received in SPI.
Acknowledgement
Distance
Correctness
Receipt
21. SPI has no _______ slave addressing system.
Complicated
Easy
Clarity
Moderate
22. Slaves in SPI with master clock doesn’t require ______ type of oscillators.
Inaccuracy
Precision
Simple
Complex
23. Slaves in SPI doesn’t require ______ type of address.
Complex
Simple
Unique
More easy
24. ______ are not necessary in SPI, unlike CAN bus.
Receivers
Transmitters
Oscillators
Transceivers
25. SPI has higher ________ than I2C or SMBus.
Flexibility
Bandwidth
Throughput
None of the above
26. AVR Controllers are coded using a _____ Interface.
UART
USB
I2C
SPI
27. AVR Controllers are coded using a _____ Interface.
UART
USB
I2C
SPI
28. SPI distance can be handled via transceivers like ______?
RS-232
RS-422
RS-109
RS-101
29. In SPI, master can ______ the next clock edge to slow the transfer rate.
Continues
Delay
Passes
Moves
30. A Full duplex capability makes ______ protocol very simple for master/slave applications.
UART
USB
SPI
I2C
31. Daisy chain ype configuration requires _____ to gain a bank of I/P’s or O/P’s via SPI.
Actuators
Shift registers
Oscillators
ICs
32. _______ are used in Independent slave configuration between power sources and chip selections?
Shift registers
Pull-up resistors
Thermistors
Oscillators
33. Sometimes SPI uses other signals to send an _______signal inorder to host the CPU.
Interrupt
Timing
Clock
None of the above
34. Quad SPI, Dual SPI are variants of _____ mode of communication.
Full duplex Half duplex
Half duplex
Semi
None of the above
35. SPI protocol ______ are tools which sample an SPI bus and decode the electrical signals.
Registers
Oscillators
Analyzers
Timers
36. If slave devices are not selected then their MISO Signal becomes _______? High impedance
High impedance
Low impedance
Low impedance
none of these
37. Signals in SPI are unidirectional which allows easy ______ isolation?
Galvanic
Thermometer
Thermistor
None of These
38. Signals in SPI are unidirectional which allows easy ______ isolation?
Galvanic
Thermometer
Thermistor
None of These
39. QSPI stands for ___________?
Quality Serial Peripheral
Queued SPI
Quants SPI
Quantity SPI
40. There are similarities between SPI and _____ protocol.
FPGA
JTAG
PPI
I2C
41. If CPOL and CPHA are 0, then the data is sampled at the main ____ edge of the clock.
Falling
Rising
Decrease
Decrement
42. If CPOL =1 and CPHA are 0, then the data is sampled at the main ____ edge of the clock.
Falling
Rising
Increase
High
43. If CPOL =1 and CPHA are 1, then the data is sampled at the drag ____ edge of the clock.
Falling
Rising
Decrease
Decrement
44. Using the Arduino module, SPI is programmed using _____ commands?
ShiftIn()
SizeIn()
ShiftDown()
ShiftUp()
45. Using the Arduino SPI Library, the speed is set by the ______ function?
sSetClockDivider()
setUp()
setDown()
setIn()
46. Using the Arduino SPI Library, the data is sent by the ______ function?
setClockDivider()
setBitOrder()
setDown()
setIn()
47. Using the Arduino SPI Library, the raising and falling edge is controlled by ___ function?
setClockDivider()
setBitOrder()
setDataMode()
setIn()
48. Using the Arduino SPI Library, the clock frequency which divides is ____ MHz.
11
12
16
14
49. SPI supports _____ peripherals.
Single
Multiple
Low
High
50. COPI stands for _______?
Clock from controller
Clock Out Pin in
Controller Out peripheral In
Controller In Peripheral Out
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